Summary
Samsung and AMD signed an MOU on March 18, 2026, to expand strategic collaboration on next-generation AI memory and computing technologies. Samsung is designated as the primary HBM4 supplier for AMD’s Instinct MI455X GPU, with the deal also covering advanced DDR5 for AMD’s EPYC Venice CPUs. The signing ceremony at Samsung’s Pyeongtaek complex, attended by Lisa Su and Samsung Vice Chairman Young Hyun Jun, signals AMD’s deepening engagement with Korean memory supply chains as it competes with Nvidia in AI accelerators.
Key Points
- Samsung designated as primary HBM4 supplier for AMD Instinct MI455X GPU (next-generation AI accelerator)
- Deal also covers advanced DRAM and high-performance DDR5 optimized for 6th Gen AMD EPYC CPUs (codenamed “Venice”)
- HBM4 specs: built on 6th-generation 10nm-class DRAM process, 4nm logic base die, up to 13 Gbps processing speed, maximum 3.3 TB/s bandwidth
- Signing ceremony held at Samsung’s Pyeongtaek manufacturing complex — Samsung’s most advanced chip fab
- Lisa Su (AMD CEO) and Young Hyun Jun (Samsung Vice Chairman & CEO) attended; Lisa Su also reportedly met privately with Lee Jae-yong (Jay Y. Lee), signaling strategic importance at the highest levels
- Lisa Su’s visit was part of a broader South Korea trip including meetings with Naver
- The deal positions AMD to compete more aggressively with Nvidia in AI accelerators by securing next-generation memory supply
Newsletter Angles
- Technology / Infrastructure: This is a supply chain alliance story. AMD is locking in HBM4 supply from Samsung to avoid the bottleneck that has constrained AI accelerator production industry-wide. The fact that Lisa Su personally visited Pyeongtaek and met with Jay Y. Lee underscores that memory supply is now a C-suite strategic priority, not a procurement detail.
- Power: The AMD-Samsung alliance reshapes the AI accelerator competitive landscape. SK Hynix has been Nvidia’s primary HBM supplier — Samsung aligning with AMD creates a parallel supply chain axis. This is the memory industry bifurcating along AI accelerator partnerships.
- Supply Chain: HBM4 specs (13 Gbps, 3.3 TB/s) represent a generational leap. The 4nm logic base die is notable — it means HBM is no longer “just memory” but a logic-memory hybrid, blurring the line between compute and storage.
Entities Mentioned
- Samsung — designated as primary HBM4 supplier for AMD; hosting the deal at Pyeongtaek
- AMD — securing next-gen memory supply for MI455X GPU and EPYC Venice CPUs
- Lisa Su — AMD CEO, personally attended signing and met with Samsung leadership
- Young Hyun Jun — Samsung Electronics Vice Chairman & CEO, attended signing
- Lee Jae-yong — Samsung Vice Chairman (Jay Y. Lee), held private meeting with Lisa Su
- Nvidia — AMD’s primary competitor in AI accelerators; implicit context for the deal
- SK Hynix — Nvidia’s primary HBM supplier; Samsung-AMD alliance creates a competing axis
- Naver — South Korean tech company; Lisa Su visited during the same trip
Concepts Mentioned
- HBM Supply Chain Alliances — the emerging pattern of memory makers aligning with specific AI accelerator companies
- AI Memory Demand — HBM4 as the next-generation memory standard for AI workloads
- DDR5 Price Dynamics — DDR5 for EPYC Venice is part of the deal
Quotes
(No direct quotes available — press release content was synthesized from multiple sources)
Notes
Original press release page timed out on fetch; content synthesized from AMD press release, Samsung Global Newsroom, KoreaTechDesk, Digitimes, and Futunn reporting. The private meeting between Lisa Su and Lee Jae-yong is sourced from reports rather than the official press release, and should be treated as unconfirmed but plausible. The deal’s significance is best understood in the context of the SK Hynix-Nvidia relationship — Samsung needs AMD to diversify its HBM customer base, and AMD needs Samsung to avoid dependence on SK Hynix (which prioritizes Nvidia).